1. Field of the Invention
The present invention relates to a method of operating a memory device. More particularly, the present invention relates to a method of operating a non-volatile memory.
2. Description of the Related Art
Electrically erasable programmable read only memory (EEPROM) is one type of non-volatile memory that permits multiple data input, readout and erasure. Furthermore, input data can still be retained after power supply to the device is removed. Therefore, EEPROM has become one of the mostly widely adopted memory devices for personal computer and electronic equipment.
Typically, each EEPROM cell has a floating gate and a control gate fabricated using doped polysilicon. In the process of programming the memory cell, electrons injected into the floating gate will distribute evenly over the entire polysilicon floating gate layer. However, if the tunneling oxide layer underneath the polysilicon floating gate has some defects, current may leak out from the device causing reliability problems.
To minimize the current leak in the EEPROM device, a conventional method includes replacing the polysilicon floating gate with a charge-trapping layer. The charge-trapping layer is fabricated using silicon nitride, for example. The silicon nitride charge-trapping layer is normally sandwiched between a top silicon oxide layer and a bottom silicon oxide layer to form a stacked gate structure comprising an oxide/nitride/oxide (ONO) composite dielectric layer. An EEPROM having such as stacked gate structure is frequently referred to as a nitride read-only-memory (NROM).
Since the NROM is normally programmed through the injection of hot electrons, a high operating voltage and a high power rating is required. However, as the size of non-volatile memory cells continues to shrink due to miniaturization, the length of the channel must be reduced. Therefore, a high operating voltage will intensify the punch-through effect and result in a higher leakage current and a lower programming efficiency.